1. Field of the Invention
The present invention relates to a semiconductor device evaluation method and a semiconductor device evaluation apparatus for detecting a problematic or error portion of the semiconductor device and providing a substrate for observing a cross section of the semiconductor device.
Priority is claimed on Japanese Patent Application No. 2007-055755, filed Mar. 6, 2007, the content of which is incorporated herein by reference.
2. Description of Related Art
In recent years, semiconductor devices have been becoming very thin and have multiple layers. Therefore, there is a significant increase in the number of production step processes of semiconductor devices, and there is an increase of a ratio of physical problems of the semiconductor devices.
Among such physical problems, problems caused by foreign matter being present on a surface, the shape, and the like can be detected by applying an optical test. On the other hand, an electrical problem such as conduction problem of a contact plug arranged between or under layers can be detected by using a SEM (Scanning Electron Microscope) test apparatus using EB (electron beam). For example, if EB is radiated when multiple contact plugs are exposed, a contact plug which has a conduction problem with a conductive material arranged at a lower layer has electrification of electrons, and the contact plug has a lower contrast because of lower secondary electrons compared to other normal contact plugs. An error bit is detected by using such phenomena of a voltage contrast.
However, there is another problem in which it is not possible to process constitutional materials by using EB even if the SEM test apparatus can detect a position of the electrical problem. Therefore, it is not possible to physically detect details of the electrical problem, and it is not possible to detect phenomena that have caused the problem in the production process. Therefore, in order to analyze the cause of the problem, it is very important to detect a position of the electrical problem, to analyze a cross section of the semiconductor substrate after exposing a portion of the problem by processing and to detect the physical condition of the problem.
In order to solve such a problem, a solution has been proposed in which, after detecting the position of the electrical problem by the SEM test apparatus, the semiconductor substrate is moved and mounted on FIB (Focused Ion Beam) apparatus which can process constitutional materials, and a portion of the problem is processed. In such an operation of moving the semiconductor substrate, in order to prevent the position of the problem from being missed, a burn mark (burning by EB which uses electrification) is set in accordance with techniques disclosed in, for example, Patent Document 1. After moving and mounting the semiconductor substrate on the FIB apparatus, based on the burn mark, the bit position of the problem is recognized.    [Patent Document 1] Japanese Patent Application, First Publication No. 2001-127125
However, the above-described burn mark is an unstable mark which disappears in the case of a leakage of electricity. Therefore, if time has passed, it is difficult to detect the mark. That is, it is not an unusual case in which it is not possible to detect the burn mark after moving and mounting the semiconductor substrate on the FIB apparatus from the test apparatus. Therefore, in a practical case, in order to detect the position of the error bit, until a position of the problem is detected, it is necessary to repeat an operation in which a cross section is reviewed by using SEM while shaving or slicing a surface of the substrate by using the FIB apparatus. However, in accordance with such an operation, it takes long time for conducting FIB processes because the position of the error bit is not clear beforehand, and moreover, there is a possibility in which the problem of the error bit is removed or lost by shaving or slicing the FIB apparatus.
On the other hand, another solution has been proposed in which the position of the error bit is detected by counting a number of bits from a mat end, that is, from the position of a certain bit at the end of arrayed pattern of an observed object formed on the substrate.
However, in such a solution, there is a problem in which a number of bits is counted by an operator, and it takes an excess amount of time and labor.